EN
ET74HC573
연락처
일반 설명
The ET74HC573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH OE on causes the outputs to assume a high-impedance OFF-state. Operation of OE the input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
사양
샘플
특징
- Wide supply voltage range from 2.0 to 6.0 V
- CMOS low power dissipation
- High noise immunity
- Input levels: CMOS level
- Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
- Useful as input or output port for microprocessors and microcomputers
- 3-state non-inverting outputs for bus-oriented applications
- Common 3-state output enable input
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Multiple package options
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
기술 문서
| 유형 | 제목 | 형식 | 날짜 |
|---|---|---|---|
| 데이터시트 | ET74HC573 데이터시트 | 2026-04-17 |
