Stock Code 688601

ET74AVCH8T245

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ET74AVCH8T245

General Description

The ET74AVCH8T245 is an 8-bit, dual supply transceiver that enables bidirectional level translation. It features two 8-bit input-output ports (An and Bn), a direction control input (DIR), an output enable input () and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8V and 3.6V making the device suitable for translating between any of the low voltage nodes (0.8V, 1.2V, 1.8V, and 3.3V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input () can be used to disable the outputs so the buses are effectively isolated. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active. The ET74AVCH8T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.

Features

  • Wide Supply Voltage Range: VCC(A): 0.8V to 3.6V VCC(B): 0.8V to 3.6V
  • Fully Configurable Dual-Rail Design
  • Bus Hold on Data Inputs
  • IOFF Circuitry Provides Partial Power-down Mode Operation
  • Ambient temperature range of -40°C to +125°C
  • ESD protection exceeds JESD22 4000 V Human-Body Model (A114-A) 1500 V Charged-Device Model (C101)
  • Latch-up performance exceeds 100mA per JESD78, Class II

Technical Documentation

Type Title Format Date
Datasheet ET74AVCH8T245 Datasheet PDF 2025-11-07

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